Multilevel logic optimization of very high complexity circuits

Authors:
Luc Burgun;N. Dictus;Alain Greiner;E. Prado Lopes;C. Sarwary
Affiliations:
Laboratoire MASI/CAO-VLSI - Université Pierre et Marie Curie 4, place Jussieu, 75252 Paris Cedex 05, France;Laboratoire MASI/CAO-VLSI - Université Pierre et Marie Curie 4, place Jussieu, 75252 Paris Cedex 05, France;Laboratoire MASI/CAO-VLSI - Université Pierre et Marie Curie 4, place Jussieu, 75252 Paris Cedex 05, France;Laboratoire MASI/CAO-VLSI - Université Pierre et Marie Curie 4, place Jussieu, 75252 Paris Cedex 05, France;Laboratoire MASI/CAO-VLSI - Université Pierre et Marie Curie 4, place Jussieu, 75252 Paris Cedex 05, France
Venue:
EURO-DAC '94 Proceedings of the conference on European design automation
Year:
1994

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