Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Edge-valued binary decision diagrams for multi-level hierarchical verification
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Spectral transforms for large boolean functions with applications to technology mapping
DAC '93 Proceedings of the 30th international Design Automation Conference
DAC '94 Proceedings of the 31st annual Design Automation Conference
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Binary decision diagrams and beyond: enabling technologies for formal verification
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Algebraic decision diagrams and their applications
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
PHDD: an efficient graph representation for floating point circuit verification
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
On the Descriptive and Algorithmic Power of Parity Ordered Binary Decision Diagrams
STACS '97 Proceedings of the 14th Annual Symposium on Theoretical Aspects of Computer Science
K*BMDs: A New Data Structure for Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Word-Level Decision Diagrams, WLCDs and Division
Word-Level Decision Diagrams, WLCDs and Division
Formal verification of word-level specifications
DATE '99 Proceedings of the conference on Design, automation and test in Europe
On WLCDs and the Complexity of Word-Level Decision Diagrams—A Lower Bound for Division
Formal Methods in System Design
Design Verification by Test Vectors and Arithmetic Transform Universal Test Set
IEEE Transactions on Computers
Using Word-Level Information in Formal Hardware Verification
Automation and Remote Control
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