Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
BDD-based logic synthesis for LUT-based FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
USING IF-THEN-ELSE DAGs FOR MULTI-LEVEL LOGIC MINIMIZATION
USING IF-THEN-ELSE DAGs FOR MULTI-LEVEL LOGIC MINIMIZATION
A BDD-based fast heuristic algorithm for disjoint decomposition
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
STACCATO: disjoint support decompositions from BDDs through symbolic kernels
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computers
BDS: a BDD-based logic optimization system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multiple-Valued Minimization for PLA Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MIS: A Multiple-Level Logic Optimization System
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Towards structured ASICs using polarity-tunable Si nanowire transistors
Proceedings of the 50th Annual Design Automation Conference
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Despite the impressive advance of logic synthesis during the past decades, a general methodology capable of efficiently synthesizing both control and datapath logic is still missing. Indeed, while synthesis techniques for random control logic (AND/OR-intensive) are well established, no dominant method for automated synthesis of datapath logic (XOR/MAJ-intensive) has yet emerged. Recently, Binary Decision Diagrams (BDDs) have been adopted to create an optimization system, named BDS, that supports integrated synthesis of both AND/OR- and XOR-intensive functions through functional logic decomposition on the BDD structure. However, it does not support direct decomposition and manipulation of majority logic which, instead, is widely used in datapath circuits. In this paper, we present the first BDD-based majority logic decomposition method and a logic decomposition system, BDS-MAJ, that enables efficient logic synthesis for both random control and datapath circuits. Experimental results show that logic synthesis based on BDS-MAJ produces CMOS circuits having on average 28.8% and 26.4% less area and, at the same time, 12.8% and 20.9% smaller delay with respect to academic ABC and BDS synthesis tools. Compared to commercial Synopsys Design Compiler synthesis tool, BDS-MAJ reduces on average the circuit area by 6.0% and decreases the delay by 7.8%.