Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Exact calculation of synchronization sequences based on binary decision diagrams
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
An introduction to Kolmogorov complexity and its applications
An introduction to Kolmogorov complexity and its applications
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Languages represented by Boolean formulas
Information Processing Letters
Succinct representation, leaf languages, and projection reductions
Information and Computation
GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
Model checking
To split or to conjoin: the question in image computation
Proceedings of the 37th Annual Design Automation Conference
Datalog LITE: a deductive query language with linear time model checking
ACM Transactions on Computational Logic (TOCL)
Symbolic Model Checking
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Automatic Derivation of FSM Specification to Implementation Encoding
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Border-Block Triangular Form and Conjunction Schedule in Image Computation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Complexity of Problems on Graphs Represented as OBDDs (Extended Abstract)
STACS '98 Proceedings of the 15th Annual Symposium on Theoretical Aspects of Computer Science
NUSMV: A New Symbolic Model Verifier
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Introduction to a Computational Theory and Implementation of Sequential Hardware Equivalence
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
An Iterative Approach to Language Containment
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Handbook of automated reasoning
LICS '99 Proceedings of the 14th Annual IEEE Symposium on Logic in Computer Science
How to Encode a Logical Structure by an OBDD
COCO '98 Proceedings of the Thirteenth Annual IEEE Conference on Computational Complexity
Verification of Embedded Software: Problems and Perspectives
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Software Hazard and Safety Analysis
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Making Abstract Model Checking Strongly Preserving
SAS '02 Proceedings of the 9th International Symposium on Static Analysis
Orientations in Verification Engineering of Avionics Software
Informatics - 10 Years Back. 10 Years Ahead.
Towards Compositional Verification in MEDISTAM-RT Methodological Framework
IWANN '09 Proceedings of the 10th International Work-Conference on Artificial Neural Networks: Part II: Distributed Computing, Artificial Intelligence, Bioinformatics, Soft Computing, and Ambient Assisted Living
CASE'09 Proceedings of the fifth annual IEEE international conference on Automation science and engineering
A formal approach for the development of reactive systems
Information and Software Technology
Static analysis, abstract interpretation and verification in (constraint logic) programming
A 25-year perspective on logic programming
Application of static analyses for state-space reduction to the microcontroller binary code
Science of Computer Programming
Trustworthy organic computing systems: challenges and perspectives
ATC'10 Proceedings of the 7th international conference on Autonomic and trusted computing
Electronic Notes in Theoretical Computer Science (ENTCS)
Formal hardware/software co-verification by interval property checking with abstraction
Proceedings of the 48th Design Automation Conference
Weak Alphabet Merging of Partial Behavior Models
ACM Transactions on Software Engineering and Methodology (TOSEM)
Use of timed automata and model-checking to explore scenarios on ecosystem models
Environmental Modelling & Software
CTL model checking for boolean program
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part IV
Combining formal methods for the development of reactive systems
International Journal of Computer Applications in Technology
Verification of graph grammars using a logical approach
Science of Computer Programming
Strong preservation of temporal fixpoint-based operators by abstract interpretation
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Managing ad-hoc networks through the formal specification of service requirements
COORDINATION'06 Proceedings of the 8th international conference on Coordination Models and Languages
Combining Formal Methods for the Development of Reactive Systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Modeling and Verification of Discrete Event Systems
Evaluating the Consistency between Navigation and Data Models for Web Applications
International Journal of Information System Modeling and Design
Hi-index | 0.00 |
Model checking is an automatic verification technique for finite state concurrent systems. In this approach to verification, temporal logic specifications are checked by an exhaustive search of the state space of the concurrent system. Since the size of the state space grows exponentially with the number of processes, model checking techniques based on explicit state enumeration can only handle relatively small examples. This phenomenon is commonly called the "State Explosion Problem". Over the past ten years considerable progress has been made on this problem by (1) representing the state space symbolically using BDDs and by (2) using abstraction to reduce the size of the state space that must be searched. As a result model checking has been used successfully to find extremely subtle errors in hardware controllers and communication protocols. In spite of these successes, however, additional research is needed to handle large designs of industrial complexity. This aim of this paper is to give a succinct survey of symbolic model checking and to introduce the reader to recent advances in abstraction.