Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Using BDDs to verify multipliers
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Spectral transforms for large boolean functions with applications to technology mapping
DAC '93 Proceedings of the 30th international Design Automation Conference
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Boolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
The Complexity of Equivalence and Containment for Free Single Variable Program Schemes
Proceedings of the Fifth Colloquium on Automata, Languages and Programming
Efficient construction of binary moment diagrams for verifying arithmetic circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Sampling schemes for computing OBDD variable orderings
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Hypergraph isomorphism and structural equivalence of Boolean functions
STOC '99 Proceedings of the thirty-first annual ACM symposium on Theory of computing
OBDD Minimization Based on Two-Level Representation of Boolean Functions
IEEE Transactions on Computers
Equivalence checking of integer multipliers
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Information and Computation - Special issue: LICS'97
Formal Verification of Combinational Circuit
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Probabilistic transfer matrices in symbolic reliability analysis of logic circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On the size of randomized OBDDs and read-once branching programs for k-stable functions
STACS'99 Proceedings of the 16th annual conference on Theoretical aspects of computer science
Hi-index | 14.98 |
A new Boolean function representation scheme, the Indexed Binary Decision Diagram (IBDD), is proposed to provide a compact representation for functions whose Ordered Binary Decision Diagram (OBDD) representation is intractably large. We explain properties of IBDDs and present algorithms for constructing IBDDs from a given circuit. Practical and effective algorithms for satisfiability testing and equivalence checking of IBDDs, as well as their implementation results, are also presented. The results show that many functions, such as multipliers and the hidden-weighted-bit function, whose analysis is intractable using OBDDs, can be efficiently accomplished using IBDDs. We report efficient verification of Booth multipliers, as well as a practical strategy for polynomial time verification of some classes of unsigned array multipliers.