Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Data structures for formal verification of circuit designs
Data structures for formal verification of circuit designs
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Auxiliary variables for extending symbolic traversal techniques to data paths
DAC '94 Proceedings of the 31st annual Design Automation Conference
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Residue BDD and its application to the verification of arithmetic circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Efficient construction of binary moment diagrams for verifying arithmetic circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Tearing based automatic abstraction for CTL model checking
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
On the Expressive Power of OKFDDs
Formal Methods in System Design
Indexed BDDs: Algorithmic Advances in Techniques to Represent and Verify Boolean Functions
IEEE Transactions on Computers
Auxiliary variables for BDD-based representation and manipulation of Boolean functions
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Induction-based gate-level verification of multipliers
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Understanding Integrated Circuits
IEEE Design & Test
A Characterization of Binary Decision Diagrams
IEEE Transactions on Computers
How many decomposition types do we need? [decision diagrams]
EDTC '95 Proceedings of the 1995 European conference on Design and Test
IEEE Transactions on Computers
Logic design error diagnosis and correction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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