Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Automated reasoning (2nd ed.): introduction and applications
Automated reasoning (2nd ed.): introduction and applications
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Using BDDs to verify multipliers
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
SubGemini: identifying subcircuits using a fast subgraph isomorphism algorithm
DAC '93 Proceedings of the 30th international Design Automation Conference
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Design recovery for combinational logic exploiting boolean relationships
Design recovery for combinational logic exploiting boolean relationships
Error Control Coding, Second Edition
Error Control Coding, Second Edition
Candidate subcircuits for functional module identification in logic circuits
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
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Reverse engineering is the inverse of the design process. The design process begins with an abstract description of a target device and, via a succession of refinements, produces a design that can be implemented directly. Reverse engineering, on the other hand, begins with the disassembly of a manufactured device and culminates with an abstract description of the device's functionality. In the case of integrated circuits, the disassembly process consists of obtaining an image of the internal structure of a circuit and extracting a transistor-level netlist from the image. This description is then transformed to successively higher levels of abstraction until a suitably high-level description of the circuit's behavior is obtained.Much has been written about methods for obtaining images 戮 for example, sample preparation via chemical etching and image acquisition via scanning-electron-microscopy 戮 and about extracting information from images 戮 for example, techniques for automated component identification via pattern recognition. There appears, however, to be little written about deriving an understanding of a circuit's behavior from a detailed circuit description. This tutorial describes an approach to one aspect of this problem 戮 deriving a module-level description from a gate-level netlist. The approach includes a number of transformations, based on well understood properties of circuits, and a set of rules (algorithms and heuristics) for applying the transformations in a computationally feasible way.