Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
POLLUX: a LUSTRE based hardware design environment
Proceedings of the international workshop on Algorithms and parallel VLSI architectures II
The STATEMATE semantics of statecharts
ACM Transactions on Software Engineering and Methodology (TOSEM)
Synchronous Programming of Reactive Systems
Synchronous Programming of Reactive Systems
Performance Analysis of Real-Time Embeded Software
Performance Analysis of Real-Time Embeded Software
A Verified Hardware Synthesis of Esterel Programs
DIPES '00 Proceedings of the IFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems: Architecture and Design of Distributed Embedded Systems
Tutorial: Compiling concurrent languages for sequential processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Making cyclic circuits acyclic
Proceedings of the 40th annual Design Automation Conference
The synthesis of cyclic combinational circuits
Proceedings of the 40th annual Design Automation Conference
Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Safety Property Verification of Cyclic Synchronous Circuits
Electronic Notes in Theoretical Computer Science (ENTCS)
Verifying the adaptation behavior of embedded systems
Proceedings of the 2006 international workshop on Self-adaptation and self-managing systems
Causality interfaces for actor networks
ACM Transactions on Embedded Computing Systems (TECS)
Formal Reasoning About Causality Analysis
TPHOLs '08 Proceedings of the 21st International Conference on Theorem Proving in Higher Order Logics
Separate compilation for synchronous programs
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
A Verified Compiler for Synchronous Programs with Local Declarations
Electronic Notes in Theoretical Computer Science (ENTCS)
Static data-flow analysis of synchronous programs
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Translating concurrent action oriented specifications to synchronous guarded actions
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
SMT-based optimization for synchronous programs
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
Concurrent semantics without the notions of state or state transitions
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
Constructive Boolean circuits and the exactness of timed ternary simulation
Formal Methods in System Design
Passive code in synchronous programs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
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Synchronous programs are well-suited for the implementation of real-time embedded systems. However, their compilation is difficult due to the paradigm that microsteps are executed in zero time. This can yield cyclic dependencies that must be resolved to generate single-threaded code. State of the art techniques are based on a fixpoint computation at compile time that 'simulates' the microstep execution. However, existing procedures do not consider delayed actions that have been recently introduced in synchronous languages. In this paper, we show that the analysis of programs with delayed actions can be performed by two fixpoint computations, one for the initialization and one for the transitions of the system. Moreover, we discuss an implementation using BDDs that is based on dual rail encoding.