Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Timing assumptions and verification of finite-state concurrent systems
Proceedings of the international workshop on Automatic verification methods for finite state systems
Compiling Real-Time Specifications into Extended Automata
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Symbolic approximations for verifying real-time systems
Symbolic approximations for verifying real-time systems
Automatic Verification on the Large
HASE '98 The 3rd IEEE International Symposium on High-Assurance Systems Engineering
FORTE XII / PSTV XIX '99 Proceedings of the IFIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE XII) and Protocol Specification, Testing and Verification (PSTV XIX)
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Data-Structures for the Verification of Timed Automata
HART '97 Proceedings of the International Workshop on Hybrid and Real-Time Systems
Approximate reachability analysis of timed automata
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Region Encoding Diagram for Fully Symbolic Verification of Real-Time Systems
COMPSAC '00 24th International Computer Software and Applications Conference
Symmetric Symbolic Safety-Analysis of Concurrent Software with Pointer Data Structures
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Bounded Model Checking for Timed Systems
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Efficient Verification of Timed Automata with BDD-Like Data-Structures
VMCAI 2003 Proceedings of the 4th International Conference on Verification, Model Checking, and Abstract Interpretation
BOXES: a symbolic abstract domain of boxes
SAS'10 Proceedings of the 17th international conference on Static analysis
Symbolic verification of distributed real-time systems with complex synchronizations
ICFEM'05 Proceedings of the 7th international conference on Formal Methods and Software Engineering
Interoperability of constrained finite state automata
ACM SIGSOFT Software Engineering Notes
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
HSCC'05 Proceedings of the 8th international conference on Hybrid Systems: computation and control
A logic for knowledge, correctness, and real time
CLIMA'04 Proceedings of the 5th international conference on Computational Logic in Multi-Agent Systems
Symbolic model checking of finite precision timed automata
ICTAC'05 Proceedings of the Second international conference on Theoretical Aspects of Computing
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A new data-structure called RED (Re gion-Encoding Diagram) for the fully symbolic model-checking of real-time software systems is proposed. RED is a BDD-like data-structure for the encoding of regions. Unlike DBM which records differences between pairs of clock readings, RED only uses one auxiliary binary variable for each clock. Thus the number of variables used in RED is always linear to the number of clocks declared in the input system description. Experiment has been carried out to compare RED with previous technologies.