Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Fast correlation attacks on certain stream ciphers
Journal of Cryptology
Pseudorandom Bit Generators in Stream-Cipher Cryptography
Computer - Special issue on cryptography
CRYPTO '93 Proceedings of the 13th annual international cryptology conference on Advances in cryptology
Generating De Bruijn Sequences: An Efficient Implementation
IEEE Transactions on Computers
Novel verification framework combining structural and OBDD methods in a synthesis environment
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Pseudorandomness and Cryptographic Applications
Pseudorandomness and Cryptographic Applications
Shift Register Sequences
Synthesis of minimal cost nonlinear feedback shift registers
Signal Processing
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
New Constructions of Resilient Boolean Functions with Maximal Nonlinearity
FSE '01 Revised Papers from the 8th International Workshop on Fast Software Encryption
Design and study of a strong crypto-system model for e-Commerce
ICCC '02 Proceedings of the 15th international conference on Computer communication
Modified Alternating$$\vec{k}$$--generators
Designs, Codes and Cryptography
Cryptanalysis of the "Grain" family of stream ciphers
ASIACCS '06 Proceedings of the 2006 ACM Symposium on Information, computer and communications security
A survey of recent developments in cryptographic algorithms for smart cards
Computer Networks: The International Journal of Computer and Telecommunications Networking
Grain: a stream cipher for constrained environments
International Journal of Wireless and Mobile Computing
Open problems related to algebraic attacks on stream ciphers
WCC'05 Proceedings of the 2005 international conference on Coding and Cryptography
A transformation from the Fibonacci to the Galois NLFSRs
IEEE Transactions on Information Theory
VLSI implementation of a non-linear feedback shift register for high-speed cryptography applications
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Finding matching initial states for equivalent NLFSRs in the Fibonacci and the Galois configurations
IEEE Transactions on Information Theory
How to speed-up your NLFSR-based stream cipher
Proceedings of the Conference on Design, Automation and Test in Europe
An algorithm for constructing a fastest Galois NLFSR generating a given sequence
SETA'10 Proceedings of the 6th international conference on Sequences and their applications
Designing stream cipher systems using genetic programming
LION'05 Proceedings of the 5th international conference on Learning and Intelligent Optimization
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Non-Linear Feedback Shift Registers (NLFSRs) have been proposed as an alternative to Linear Feedback Shift Registers (LFSRs) for generating pseudo-random sequences for stream ciphers. In this paper, we introduce (n, k)-NLFSRs which can be considered a generalization of the Galois type of LFSR. In an (n, k)-NLFSR, the feedback can be taken from any of the n bits, and the next state functions can be any Boolean function of up to k variables. Our motivation for considering this type NLFSRs is that their Galois configuration makes it possible to compute each next state function in parallel, thus increasing the speed of output sequence generation. Thus, for stream cipher application where the encryption speed is important, (n, k)-NLFSRs may be a better alternative than the traditional Fibonacci ones. We derive a number of properties of (n, k)-NLFSRs. First, we demonstrate that they are capable of generating output sequences with good statistical properties which cannot be generated by the Fibonacci type of NLFSRs. Second, we show that the period of the output sequence of an (n, k)-NLFSR is not necessarily equal to the length of the largest cycle of its states. Third, we compute the period of an (n, k)-NLFSR constructed from several parallel NLFSRs whose outputs are XOR-ed and show how to maximize this period. We also present an algorithm for estimating the length of cycles of states of (n, k)-NLFSRs which uses Binary Decision Diagrams for representing the set of states and the transition relation on this set.