Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Supervisory control of a class of discrete event processes
SIAM Journal on Control and Optimization
The Transduction Method-Design of Logic Networks Based on Permissible Functions
IEEE Transactions on Computers
Approaches to multi-level sequential logic synthesis
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Incremental Synthesis for Engineering Changes
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
The Maximum Set of Permissible Behaviors for FSM Networks
The Maximum Set of Permissible Behaviors for FSM Networks
Protocol testing: review of methods and relevance for software testing
ISSTA '94 Proceedings of the 1994 ACM SIGSOFT international symposium on Software testing and analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Sequential synthesis using S1S
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Multi-level logic optimization of FSM networks
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Engineering change in a non-deterministic FSM setting
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Exact required time analysis via false path detection
DAC '97 Proceedings of the 34th annual Design Automation Conference
Optimizing designs containing black boxes
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Logic Synthesis and Verification
Optimization of synchronous circuits
Logic Synthesis and Verification
The future of logic synthesis and verification
Logic Synthesis and Verification
Solution of parallel language equations for logic synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Compatible observability don't cares revisited
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Modeling and optimization of hierarchical synchronous circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Sequential Permissible Functions and their Application to Circuit Optimization
EDTC '96 Proceedings of the 1996 European conference on Design and Test
On the use of reset to increase the testability of interconnected finite-state machines
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Efficient Solution of Language Equations Using Partitioned Representations
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Testing in context: framework and test derivation
Computer Communications
Constructive Boolean circuits and the exactness of timed ternary simulation
Formal Methods in System Design
| Hi-index | 0.00 |