Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Formal hardware verification by symbolic ternary trajectory evaluation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Formally verifying a microprocessor using a simulation methodology
DAC '94 Proceedings of the 31st annual Design Automation Conference
Formal verification by symbolic evaluation of partially-ordered trajectories
Formal Methods in System Design - Special issue on symbolic model checking
Symbolic timing simulation using cluster scheduling
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Efficient Modeling of Memory Arrays in Symbolic Ternary Simulation
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Higher-Level Specification and Verification with BDDs
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Efficient Modeling of Memory Arrays in Symbolic Simulation
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation
CSD '98 Proceedings of the 1998 International Conference on Application of Concurrency to System Design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Enhancing bug hunting using high-level symbolic simulation
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Optimizing blocks in an SoC using symbolic code-statement reachability analysis
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Facilitating unreachable code diagnosis and debugging
Proceedings of the 16th Asia and South Pacific Design Automation Conference
| Hi-index | 0.00 |
Symbolic simulation is a formal verification technique which combines the flexibility of conventional simulation with powerful symbolic methods. Some constructs, however, which are easy to handle in conventional simulation need special consideration in symbolic simulation. This paper discusses some special constructs that require unique treatment in symbolic simulation such as the symbolic representation of arrays, an efficient This paper discusses some special constructs that are unique to symbolic simulation such as the symbolic representation of arrays, an efficient symbolic method for storing arrayed instances and the handling of symbolic data-dependent delays. We present results which demonstrate the effectiveness of our symbolic array model in the simulation of highly regular structures like FPGAs, memories or cellular automata.