Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Computation of elementary functions on the IBM RISC System/6000 processor
IBM Journal of Research and Development
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Formal verification by symbolic evaluation of partially-ordered trajectories
Formal Methods in System Design - Special issue on symbolic model checking
A Mechanically Checked Proof of the AMD5K86TM Floating-Point Division Program
IEEE Transactions on Computers
A machine program for theorem-proving
Communications of the ACM
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Formal Verification of Square Root Algorithms
Formal Methods in System Design
HOL Light: A Tutorial Introduction
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Formal Verification of Floating Point Trigonometric Functions
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
A Machine-Checked Theory of Floating Point Arithmetic
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Formal Verification of IA-64 Division Algorithms
TPHOLs '00 Proceedings of the 13th International Conference on Theorem Proving in Higher Order Logics
Challenges for formal verification in industrial setting
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
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Only in a few isolated safety-critical niches of the software industry (e.g. avionics) is any kind of formal verification widespread. But in the hardware industry, formal verification is widely practised, and increasingly seen as necessary. We can perhaps identify at least three reasons: – Hardware is designed in a more modular way than most software, with refinement an important design method. Constraints of interconnect layering and timing means that one cannot really design ‘spaghetti hardware'. – More proofs in the hardware domain can be largely automated, reducing the need for intensive interaction by a human expert with the mechanical theorem-proving system. – The potential consequences of a hardware error are greater, since such errors often cannot be patched or worked around, and may in extremis necessitate a hardware replacement.