Computation of elementary functions on the IBM RISC System/6000 processor
IBM Journal of Research and Development
Introduction to HOL: a theorem proving environment for higher order logic
Introduction to HOL: a theorem proving environment for higher order logic
A Mechanically Checked Proof of the AMD5K86TM Floating-Point Division Program
IEEE Transactions on Computers
The functional approach to programming
The functional approach to programming
The IA-64 Architecture at Work
Computer
HOL Light: A Tutorial Introduction
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
A Machine-Checked Theory of Floating Point Arithmetic
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
Programming with Proofs: Language-Based Approaches to Totally Correct Software
Verified Software: Theories, Tools, Experiments
Theorem Proving for Verification (Invited Tutorial)
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Automatic verification of estimate functions with polynomials of bounded functions
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
FM'05 Proceedings of the 2005 international conference on Formal Methods
Floating-Point verification using theorem proving
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
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The IA-64 architecture defers floating point and integer division to software. To ensure correctness and maximum efficiency, Intel provides a number of recommended algorithms which can be called as subroutines or inlined by compilers and assembly language programmers. All these algorithms have been subjected to formal verification using the HOL Light theorem prover. As well as improving our level of confidence in the algorithms, the formal verification process has led to a better understanding of the underlying theory, allowing some significant efficiency improvements.