Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Introduction to HOL: a theorem proving environment for higher order logic
Introduction to HOL: a theorem proving environment for higher order logic
A Mechanically Checked Proof of the AMD5K86TM Floating-Point Division Program
IEEE Transactions on Computers
Computer-Aided Reasoning: An Approach
Computer-Aided Reasoning: An Approach
Formal Verification of Square Root Algorithms
Formal Methods in System Design
Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Verifying the Accuracy of Polynomial Approximations in HOL
TPHOLs '97 Proceedings of the 10th International Conference on Theorem Proving in Higher Order Logics
Verification of Floating-Point Adders
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
PVS: A Prototype Verification System
CADE-11 Proceedings of the 11th International Conference on Automated Deduction: Automated Deduction
Formal Verification of IA-64 Division Algorithms
TPHOLs '00 Proceedings of the 13th International Conference on Theorem Proving in Higher Order Logics
ACL2 Workshop 2000 Proceedings, Part A
ACL2 Workshop 2000 Proceedings, Part A
Automatic Formal Verification of Fused-Multiply-Add FPUs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
ACL2SIX: A Hint used to Integrate a Theorem Prover and an Automated Verification Tool
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
Verified Real Number Calculations: A Library for Interval Arithmetic
IEEE Transactions on Computers
MetiTarski: An Automatic Theorem Prover for Real-Valued Special Functions
Journal of Automated Reasoning
Challenges for formal verification in industrial setting
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
Large-scale application of formal verification: from fiction to fact
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Hybrid verification of a hardware modular reduction engine
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Hi-index | 0.00 |
The correctness of some arithmetic functions can be expressed in terms of the magnitude of errors. A reciprocal estimate function that returns an approximation of 1/x is such a function that is implemented in microprocessors. This paper describes an algorithm to prove that the error of an arithmetic function is less than its requirement. It divides the input domain into tiny segments, and for each segment we evaluate a requirement formula. The evaluation is carried out by converting an arithmetic function to what we call a polynomial of bounded functions, and then its upper bound is calculated and checked if it meets the requirement. The algorithm is implemented as a set of rewriting rules and computed-hints of the ACL2 theorem prover. It has been used to verify reciprocal estimate and reciprocal square root estimate instructions of one of the IBM POWERTM processors.