Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Formal methods: state of the art and future directions
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Property specification patterns for finite-state verification
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Formal modeling and analysis of an avionics triplex sensor voter
SPIN'03 Proceedings of the 10th international conference on Model checking software
Mechanised Translation of Control Law Diagrams into Circus
IFM '09 Proceedings of the 7th International Conference on Integrated Formal Methods
Machine-assisted proof support for validation beyond Simulink
ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
Mutation-based test case generation for simulink models
FMCO'09 Proceedings of the 8th international conference on Formal methods for components and objects
Architectural verification of control systems using CSP
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Lessons learnt from the adoption of formal model-based development
NFM'12 Proceedings of the 4th international conference on NASA Formal Methods
System level formal verification via model checking driven simulation
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Verifying simulink diagrams via a hybrid hoare logic prover
Proceedings of the Eleventh ACM International Conference on Embedded Software
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Model Based Development (MBD) using Mathworks tools like Simulink, Stateflow etc. is being pursued in Honeywell for the development of safety critical avionics software. Formal verification techniques are well-known to identify design errors of safety critical systems reducing development cost and time. As of now, formal verification of Simulink design models is being carried out manually resulting in excessive time consumption during the design phase. We present a tool that automatically translates certain Simulink models into input language of a suitable model checker. Formal verification of safety critical avionics components becomes faster and less error prone with this tool. Support is also provided for reverse translation of traces violating requirements (as given by the model checker) into Simulink notation for playback.