Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
BDS: a BDD-based logic optimization system
Proceedings of the 37th Annual Design Automation Conference
The K*BMD: A Verification Data Structure
IEEE Design & Test
Probabilistic decision graphs-combining verification and AI techniques for probabilistic inference
International Journal of Uncertainty, Fuzziness and Knowledge-Based Systems - New trends in probabilistic graphical models
A Probabilistic-Based Design Methodology for Nanoscale Computation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Analysis and synthesis of quantum circuits by using quantum decision diagrams
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Bifurcations and fundamental error bounds for fault-tolerant computations
IEEE Transactions on Nanotechnology
Probabilistic manipulation of Boolean functions using free Boolean diagrams
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Stochastic computational models for accurate reliability evaluation of logic circuits
Proceedings of the 20th symposium on Great lakes symposium on VLSI
RALF: reliability analysis for logic faults: an exact algorithm and its applications
Proceedings of the Conference on Design, Automation and Test in Europe
RAG: an efficient reliability analysis of logic circuits on graphics processing units
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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A decision diagram based framework is proposed for representing the probabilistic behavior of circuits with faulty gates. We introduce Probabilistic decision diagrams (PDD) as an exact computational tool which along with vast expressive power holds many other useful properties such as space efficiency (on average) and efficient manipulation algorithms (polynomial in size.) An algorithm for constructing the PDD for a circuit is proposed. Useful information about probabilistic behavior of the circuit (such as output error probability for arbitrary input probability distribution) can be directly extracted from the PDD representation. Experimental results demonstrate the effectiveness and applicability of the proposed approach.