Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
A Computer Algorithm for Minimizing Reed-Muller Canonical Forms
IEEE Transactions on Computers
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
DAC '94 Proceedings of the 31st annual Design Automation Conference
Fast OFDD based minimization of fixed polarity Reed-Muller expressions
EURO-DAC '94 Proceedings of the conference on European design automation
Fast Minimization of Mixed-Polarity AND/XOR Canonical Networks
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
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In this paper, we introduce a Shared Multiple Rooted XOR-based Decomposition Diagram (XORDD) to represent functions with multiple outputs. Based on the XORDD representation, we develop a synthesis algorithm for generalExclusive Sum-of-Product forms (ESOP). By iteratively applying transformations and reductions, we obtain a compactXORDD which gives a minimized ESOP. Our method cansynthesize larger circuits than previously possible. The compact ESOP representation provides a form that is easier to synthesize for XOR heavy multi-level circuit, such as arithmetic functions. We have applied our synthesis techniquesto a large set of benchmark circuits in both PLA and combinational formats. Results of the minimized ESOP forms obtained from our synthesis algorithm are also comparedto the SOP forms generated by ESPRESSO. Among the 74circuits we have experimented with, the minimized ESOP'shave fewer product terms than those of SOP's in 39 circuits.