On the Complexity of Mod-2l Sum PLA's
IEEE Transactions on Computers
A fast algorithm to minimize multi-output mixed-polarity generalized Reed-Muller forms
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
DAC '94 Proceedings of the 31st annual Design Automation Conference
Fast OFDD based minimization of fixed polarity Reed-Muller expressions
EURO-DAC '94 Proceedings of the conference on European design automation
IEEE Transactions on Computers
Generalized Partially-Mixed-Polarity Reed-Muller Expansion and Its Fast Computation
IEEE Transactions on Computers
Fast OFDD-Based Minimization of Fixed Polarity Reed-Muller Expressions
IEEE Transactions on Computers
Easily Testable Realizations for Generalized Reed-Muller Expressions
IEEE Transactions on Computers
A graph-based synthesis algorithm for AND/XOR networks
DAC '97 Proceedings of the 34th annual Design Automation Conference
Testability of 2-Level AND/EXOR Circuits
Journal of Electronic Testing: Theory and Applications
Exact minimization of fixed polarity Reed-Muller expressions for incompletely specified functions
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Automation and Remote Control
Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Testability of 2-level AND/EXOR circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Synthesizing complementary circuits automatically
Proceedings of the 2009 International Conference on Computer-Aided Design
Synthesizing complementary circuits automatically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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