Testability of 2-level AND/EXOR circuits

Authors:
R. Drechsler;H. Hengster;H. Schafer;J. Hartmann;B. Becker
Affiliations:
Inst. of Comp. Science, Albert-Ludwigs-University, Freiburg/Breisgau, Germany;Inst. of Comp. Science, Albert-Ludwigs-University, Freiburg/Breisgau, Germany;Dept. of Comp. Science, J.W. Goethe-University, Frankfurt/Main, Germany;DACOS Software GmbH, Neue Bahnhofstr. 21, St. Ingbert, Germany;Inst. of Comp. Science, Albert-Ludwigs-University, Freiburg/Breisgau, Germany
Venue:
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Year:
1997

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Abstract

It is often stated that AND/EXOR circuits are much easier to test than AND/OR circuits. This statement only holds for restricted classes of AND/EXOR expressions, like positive polarity Reed-Muller expressions and fixed polarity Reed-Muller expressions. For these two classes of circuits good deterministic testability properties are known. In this paper we show that for these circuits also good random pattern testability can be proven. An input probability distribution is given which yields a short expected test length for biased random patterns. This is the first time that theoretical results on random pattern testability have been presented for 2-level AND/EXOR circuit realizations of arbitrary Boolean functions. For more general classes of 2-level AND/EXOR circuits analogous results are not proven. We present experimental results that show that in general minimized 2-level AND/OR circuits are as well (or badly) testable as minimized 2-level AND/EXOR circuits.