Random pattern testable logic synthesis
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
LOT: logic optimization with testability—new transformations using recursive learning
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Testability of 2-Level AND/EXOR Circuits
Journal of Electronic Testing: Theory and Applications
BETSY: synthesizing circuits for a specified BIST environment
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testability of 2-level AND/EXOR circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Some aspects regarding pattern resistant logic
ICCOMP'09 Proceedings of the WSEAES 13th international conference on Computers
IPR: in-place reconfiguration for FPGA fault tolerance?
Proceedings of the 2009 International Conference on Computer-Aided Design
RALF: reliability analysis for logic faults: an exact algorithm and its applications
Proceedings of the Conference on Design, Automation and Test in Europe
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