Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Information Processing Letters
Statecharts: A visual formalism for complex systems
Science of Computer Programming
Synchronous programming with events and relations: the SIGNAL language and its semantics
Science of Computer Programming
SIGNAL as a model for real-time and hybrid systems
ESOP'92 Symposium proceedings on 4th European symposium on programming
Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
ACM Computing Surveys (CSUR)
Latch optimization in circuits generated from high-level descriptions
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Verification of Real-Time Systems using Linear Relation Analysis
Formal Methods in System Design - Special issue on computer aided verification (CAV 93)
The GSM System for Mobile Communications
The GSM System for Mobile Communications
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Synchronous Observers and the Verification of Reactive Systems
AMAST '93 Proceedings of the Third International Conference on Methodology and Software Technology: Algebraic Methodology and Software Technology
Constructive Semantics of Esterel: From Theory to Practice (Abstract)
AMAST '96 Proceedings of the 5th International Conference on Algebraic Methodology and Software Technology
Formal Verification of SIGNAL Programs: Application to a Power Transformer Station Controller
AMAST '96 Proceedings of the 5th International Conference on Algebraic Methodology and Software Technology
XEVE, an ESTEREL Verification Environment
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Compositional Semantics of ESTEREL and Verification by Compositional Reductions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Automatic Testing of Reactive Systems
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
Design and implementation of software radios using a general purpose processor
Design and implementation of software radios using a general purpose processor
Efficient compilation of lazy evaluation
ACM SIGPLAN Notices - Best of PLDI 1979-1999
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The software approach to developing Digital Signal Processing (DSP) applications brings some great features such as flexibility, re-usability of resources and easy upgrading of applications. However, it requires long and tedious tests and verification phases because of the increasing complexity of the software applications. This implies the need of a software programming environment capable of putting together DSP modules and providing facilities to debug, verify and validate the code. The objective of the work is to provide such facilities as simulation and verification for developing DSP software applications. This led us to developing an extension toolkit, EPSPECTRA, built upon PSPECTRA, one of the first toolkits available to design basic software radio applications on standard PC workstations. In this paper, we first present EPSPECTRA, an ESTEREL-based extension of PSPECTRA that makes the design and implementation of portable DSP applications easier. It allows the drastic reduction of testing and verification time while requiring relatively little expertise in formal verification methods. Second, we demonstrate the use of EPSPECTRA, taking as an example the radio interface part of a GSM base station. We also present the verification procedures for the three safety properties of the implementation programs which have complex control-paths. These have to obey strict scheduling rules. In addition, EPSPECTRA achieves the verification of the targeted application since the same model is used for the executable code generation and for the formal verification.