Certified timing verification and the transition delay of a logic circuit

Circuit delay models and their exact computation using Timed Boolean Functions

DAC '93 Proceedings of the 30th international Design Automation Conference

Exact minimum cycle times for finite state machines

DAC '94 Proceedings of the 31st annual Design Automation Conference

Gate-level timing verification using waveform narrowing

EURO-DAC '94 Proceedings of the conference on European design automation

Hierarchical timing analysis using conditional delays

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Delay fault coverage: a realistic metric and an estimation technique for distributed path delay faults

Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design

Efficient estimation of dynamic power consumption under a real delay model

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Event propagation conditions in circuit delay computation

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Valid clocking in wavepipelined circuits

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

A massively-parallel easily-scalable satisfiability solver using reconfigurable hardware

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Symbolic timing simulation using cluster scheduling

Proceedings of the 37th Annual Design Automation Conference

Symbolic functional and timing verification of transistor-level circuits

ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design

Propagation of last-transition-time constraints in gate-level timing analysis

Proceedings of the conference on Design, automation and test in Europe

False coupling interactions in static timing analysis

Proceedings of the 38th annual Design Automation Conference

A SAT Solver Using Reconfigurable Hardware and Virtual Logic

Journal of Automated Reasoning

A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware

FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines

A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems

FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines

Diagnosis of parametric path delay faults

VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication

Event propagation for accurate circuit delay calculation using SAT

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Unifying functional and parametric timing verification

Proceedings of the great lakes symposium on VLSI