Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Transition density, a stochastic measure of activity in digital circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Certified timing verification and the transition delay of a logic circuit
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Technology decomposition and mapping targeting low power dissipation
DAC '93 Proceedings of the 30th international Design Automation Conference
Surveys in combinatorics, 1993
Surveys in combinatorics, 1993
On average power dissipation and random pattern testability of CMOS combinational logic networks
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
SYCLOP: Synthesis of CMOS Logic for Low Power Applications
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Switching activity analysis considering spatiotemporal correlations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A cell-based power estimation in CMOS combinational circuits
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Exact and approximate methods for calculating signal and transition probabilities in FSMs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Technology mapping using fuzzy logic
DAC '94 Proceedings of the 31st annual Design Automation Conference
Efficient power estimation for highly correlated input streams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Information theoretic measures of energy consumption at register transfer level
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Techniques for fast circuit simulation applied to power estimation of CMOS circuits
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Estimation of maximum transition counts at internal nodes in CMOS VLSI circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power estimation techniques for integrated circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
POSE: power optimization and synthesis environment
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Compact vector generation for accurate power simulation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Improving the efficiency of power simulators by input vector compaction
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Power estimation of cell-based CMOS circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A new hybrid methodology for power estimation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Stochastic sequential machine synthesis targeting constrained sequence generation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Stratified random sampling for power estimation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Expected current distributions for CMOS circuits
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A novel methodology for transistor-level power estimation
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Basic experimentation on accuracy of power estimation for CMOS VLSI circuits
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Switching activity estimation using limited depth reconvergent path analysis
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
Analytical estimation of transition activity from word-level signal statistics
DAC '97 Proceedings of the 34th annual Design Automation Conference
Trace driven logic synthesis—application to power minimization
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Energy-efficiency in presence of deep submicron noise
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Power-delay optimizations in gate sizing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Stochastic sequential machine synthesis with application to constrained sequence generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Dependency preserving probabilistic modeling of switching activity using bayesian networks
Proceedings of the 38th annual Design Automation Conference
Least-square estimation of average power in digital CMOS circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Petri net modeling of gate and interconnect delays for power estimation
Proceedings of the 39th annual Design Automation Conference
A Real Delay Switching Activity Simulator based on Petri net Modeling
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Switching activity estimation of VLSI circuits using Bayesian networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Petri net modeling of gate and interconnect delays for power estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Dual-transition glitch filtering in probabilistic waveform power estimation
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Low-Power Design of 90-nm SuperH Processor Core
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
A timing dependent power estimation framework considering coupling
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Power Estimation Under Uncertain Delays
Integrated Computer-Aided Engineering
Using negative edge triggered ffs to reduce glitching power in FPGA circuits
Proceedings of the 44th annual Design Automation Conference
Dynamic power estimation for deep submicron circuits with process variation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Decomposition-based vectorless toggle rate computation for FPGA circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A timing-dependent power estimation framework considering coupling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Cascaded Bayesian inferencing for switching activity estimation with correlated inputs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis of circuit dynamic behavior with timed ternary decision diagram
Proceedings of the International Conference on Computer-Aided Design
Statistical full-chip total power estimation considering spatially correlated process variations
Integration, the VLSI Journal
An Analytical Model for Evaluating Static Power of Homogeneous FPGA Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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