A novel methodology for transistor-level power estimation

  • Authors:
  • S. Huang;K. Cheng;K. Chen;T. Lee

  • Affiliations:
  • Dept. of Electrical & Computer Engrineering, Univ. of California, Santa Barbara, Santa Barbara, CA;Dept. of Electrical & Computer Engrineering, Univ. of California, Santa Barbara, Santa Barbara, CA;Fujitsu Labs. of America, 3350 Scott Blvd. Bldg 34, Santa Clara, CA;Fujitsu Labs. of America, 3350 Scott Blvd. Bldg 34, Santa Clara, CA

  • Venue:
  • ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
  • Year:
  • 1996

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Abstract