Techniques for fast circuit simulation applied to power estimation of CMOS circuits

Authors:
Premal Buch;Shen Lin;Vijay Nagasamy;Ernest S. Kuh
Affiliations:
University of California, Berkeley, CA;IBM T. J. Watson Research Center, Yorktown Heights, NY;LSI Logic Corporation, Milpitas, CA;University of California, Berkeley, CA
Venue:
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Year:
1995

Citing 1
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Efficient estimation of dynamic power consumption under a real delay model

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Power minimization in IC design: principles and applications

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A novel methodology for transistor-level power estimation

ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design

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Abstract