Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Switching activity analysis considering spatiotemporal correlations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Estimation of circuit activity considering signal correlations and simultaneous switching
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A survey of power estimation techniques in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Architectural power analysis: the dual bit type method
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The design and implementation of PowerMill
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
HEAT: hierarchical energy analysis tool
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Efficient estimation of dynamic power consumption under a real delay model
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
On average power dissipation and random pattern testability of CMOS combinational logic networks
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Digital Coding of Waveforms: Principles and Applications to Speech and Video
Digital Coding of Waveforms: Principles and Applications to Speech and Video
Activity-sensitive architectural power analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Towards a high-level power estimation capability [digital ICs]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Information theoretic measures for power analysis [logic design]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimizing power using transformations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dynamic algorithm transformation (DAT) for low-power adaptive signal processing
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
An optimization-based error calculation for statistical power estimation of CMOS logic circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
A low-SER efficient core processor architecture for future technologies
Proceedings of the conference on Design, automation and test in Europe
Power Optimization of Parallel Multipliers in Systems with Variable Word-Length
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Switching activity reduction of MAC-based FIR filters with correlated input data
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
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Presented here is an analytical methodologyto determine the average signal activity, T, from the high-levelsignal statistics, a statistical signal generation model,and the signal encoding.Simulation results for 16 bit signalsgenerated via AR(1) and MA(1) models indicate anestimation error in T of less than 2%.The applicationof the proposed method to the estimation of T in DSPhardware is also explained.