Measurement and modeling of computer reliability as affected by system activity
ACM Transactions on Computer Systems (TOCS)
Improved Techniques for Estimating Signal Probabilities
IEEE Transactions on Computers
High-speed VLSI arithmetic processor architectures using hybrid number representation
Journal of VLSI Signal Processing Systems - Special issue: 1990 Workshop on VLSI signal processing
Switching activity analysis considering spatiotemporal correlations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Estimation of circuit activity considering signal correlations and simultaneous switching
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A cell-based power estimation in CMOS combinational circuits
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Power estimation methods for sequential logic circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A hierarchical approach to transistor-level power estimation of arithmetic units
ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 06
Analytical estimation of transition activity from word-level signal statistics
DAC '97 Proceedings of the 34th annual Design Automation Conference
A power modeling and characterization method for macrocells using structure information
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
High performance DSPs - what's hot and what's not?
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Journal of VLSI Signal Processing Systems
Power and timing modeling for ASIC designs
Proceedings of the conference on Design, automation and test in Europe
Synthesis of low power folded programmable coefficient FIR digital filters (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Clocking strategies and scannable latches for low power appliacations
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Logic transformation for low-power synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Power Estimation of Digital Data Paths Using HEAT
IEEE Design & Test
Low Power Gate Resizing of Combinational Circuits by Buffer-Redistribution
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Optimization of scannable latches for low energy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
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