Power and timing modeling for ASIC designs

  • Authors:
  • W. Roethig;A. M. Zarkesh;M. Andrews

  • Affiliations:
  • LSI Logic Corporation, Milpitas CA;Viewlogic Systems, Camarillo CA;Mentor Graphics, Wilsonville OR

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 1998

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Abstract