Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Low power state assignment targeting two-and multi-level logic implementations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Switching activity analysis considering spatiotemporal correlations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Multi-level network optimization for low power
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Logic extraction and factorization for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Efficient power estimation for highly correlated input streams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient estimation of dynamic power consumption under a real delay model
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Retiming sequential circuits for low power
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
HYPER-LP: a system for power minimization using architectural transformations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Re-mapping for low power under tight timing constraints
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Logic transformation for low power synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Glitch power minimization by gate freezing
DATE '99 Proceedings of the conference on Design, automation and test in Europe
In-place delay constrained power optimization using functional symmetries
Proceedings of the conference on Design, automation and test in Europe
Logic transformation for low-power synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Logic Synthesis and Verification
CAD Tools for Area-Distributed I/O Pad Packaging
MCMC '97 Proceedings of the 1997 Conference on IEEE Multi-Chip Module Conference
BEAM: bus encoding based on instruction-set-aware memories
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Power-aware FPGA logic synthesis using binary decision diagrams
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Hi-index | 0.00 |