Glitch power minimization by gate freezing

  • Authors:
  • L. Benini;G. De Micheli;A. Macii;E. Macii;M. Poncino;R. Scarsi

  • Affiliations:
  • Università di Bologna, Bologna, Italy;Stanford University, Stanford, CA;Politecnico di Torino, Torino, Italy;-;Politecnico di Torino, Torino, Italy;Politecnico di Torino, Torino, Italy

  • Venue:
  • DATE '99 Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 1999

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Abstract