A fast algorithm for optimal length-limited Huffman codes
Journal of the ACM (JACM)
Transition density, a stochastic measure of activity in digital circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A near optimal algorithm for technology mapping minimizing area under delay constraints
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Pattern-independent current estimation for reliability analysis of CMOS circuits
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
On average power dissipation and random pattern testability of CMOS combinational logic networks
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Estimation of circuit activity considering signal correlations and simultaneous switching
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A symbolic method to reduce power consumption of circuits containing false paths
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Technology mapping using fuzzy logic
DAC '94 Proceedings of the 31st annual Design Automation Conference
EURO-DAC '94 Proceedings of the conference on European design automation
Memory segmentation to exploit sleep mode operation
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A survey of optimization techniques targeting low power VLSI circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Logic extraction and factorization for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Transformation and synthesis of FSMs for low-power gated-clock implementation
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Simultaneous scheduling and binding for power minimization during microarchitecture synthesis
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
An estimation technique to guide low power resynthesis algorithms
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Boolean techniques for low power driven re-synthesis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
System partitioning to maximize sleep time
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Transistor reordering for power minimization under delay constraint
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low power realization of finite state machines—a decomposition approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An exact algorithm for low power library-specific gate re-sizing
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Multi-level logic optimization for low power using local logic transformations
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Symbolic computation of logic implications for technology-dependent low-power synthesis
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Integrated resynthesis for low power
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Efficient estimation of dynamic power consumption under a real delay model
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Engineering change for power optimization using global sensitivity and synthesis flexibility
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Low power multiplexer decomposition
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Node normalization and decomposition in low power technology mapping
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Power-conscious high level synthesis using loop folding
DAC '97 Proceedings of the 34th annual Design Automation Conference
Layout driven re-synthesis for low power consumption LSIs
DAC '97 Proceedings of the 34th annual Design Automation Conference
Low power logic synthesis for XOR based circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
An exact gate decomposition algorithm for low-power technology mapping
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Library-less synthesis for static CMOS combinational logic circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Power optimization for FPGA look-up tables
Proceedings of the 1997 international symposium on Physical design
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Power reduction and power-delay trade-offs using logic transformations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Logic transformation for low power synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
An &agr;-approxmimate algorithm for delay-constraint technology mapping
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Optimal low powerX OR gate decomposition
Proceedings of the 37th Annual Design Automation Conference
Power minimization of functional units partially guarded computation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low-power design methodology and applications utilizing dual supply voltages
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Compiler optimization on instruction scheduling for low power
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Logic transformation for low-power synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Retiming-based logic synthesis for low-power
Proceedings of the 2002 international symposium on Low power electronics and design
Logic Synthesis and Verification
Saving Power by Synthesizing Gated Clocks for Sequential Circuits
IEEE Design & Test
Compiler optimization on VLIW instruction scheduling for low power
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low power design and its testability
ATS '95 Proceedings of the 4th Asian Test Symposium
Decomposition of logic functions for minimum transition activity
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Fast power loss calculation for digital static CMOS circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Switch level hot-carrier reliability enhancement of VLSI circuits
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
A Real Delay Switching Activity Simulator based on Petri net Modeling
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Low Power Technology Mapping for LUT based FPGA "A Genetic Algorithm Approach"
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Quality of EDA CAD Tools: Definitions, Metrics and Directions
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Technology mapping for low leakage power and high speed with hot-carrier effect consideration
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Compilers for leakage power reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low-power clustering with minimum logic replication for coarse-grained, antifuse based FPGAs
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
Algorithms and analysis of scheduling for loops with minimum switching
International Journal of Computational Science and Engineering
Efficient evolutionary approaches for the data ordering problem with inversion
EuroGP'06 Proceedings of the 2006 international conference on Applications of Evolutionary Computing
Compiler analysis and supports for leakage power reduction on microprocessors
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
| Hi-index | 0.00 |