Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Technology decomposition and mapping targeting low power dissipation
DAC '93 Proceedings of the 30th international Design Automation Conference
Low power state assignment targeting two-and multi-level logic implementations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A symbolic method to reduce power consumption of circuits containing false paths
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Precomputation-based sequential logic optimization for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Clustered voltage scaling technique for low-power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
SYCLOP: Synthesis of CMOS Logic for Low Power Applications
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
A gate resizing technique for high reduction in power consumption
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Layout driven re-synthesis for low power consumption LSIs
DAC '97 Proceedings of the 34th annual Design Automation Conference
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
A performance optimization method by gate sizing using statistical static timing analysis
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Power reduction by simultaneous voltage scaling and gate sizing
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Low Power Gate Resizing of Combinational Circuits by Buffer-Redistribution
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Leakage power optimization with dual-Vth library in high-level synthesis
Proceedings of the 42nd annual Design Automation Conference
Post-manufacture tuning for nano-CMOS yield recovery using reconfigurable logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Behavioral level dual-Vth design for reduced leakage power with thermal awareness
Proceedings of the Conference on Design, Automation and Test in Europe
Simultaneous slack budgeting and retiming for synchronous circuits optimization
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Network flow-based simultaneous retiming and slack budgeting for low power design
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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