Simultaneous slack budgeting and retiming for synchronous circuits optimization

An exact algorithm for low power library-specific gate re-sizing

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Fixed-phase retiming for low power design

ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design

Retiming sequential circuits for low power

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

An improved algorithm for minimum-area retiming

DAC '97 Proceedings of the 34th annual Design Automation Conference

Minimum-power retiming for dual-supply CMOS circuits

Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems

Unification of basic retiming and supply voltage scaling to minimize dynamic power consumption for synchronous digital designs

Proceedings of the 13th ACM Great Lakes symposium on VLSI

Delay budgeting in sequential circuit with application on FPGA placement

Proceedings of the 40th annual Design Automation Conference

Optimal integer delay budgeting on directed acyclic graphs

Proceedings of the 40th annual Design Automation Conference

Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction

ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)

Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment

Proceedings of the 41st annual Design Automation Conference

Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scaling

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Potential Slack Budgeting with Clock Skew Optimization

ICCD '04 Proceedings of the IEEE International Conference on Computer Design

Sequential delay budgeting with interconnect prediction

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Physical placement driven by sequential timing analysis

Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

Deriving a new efficient algorithm for min-period retiming

Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Integrated retiming and simultaneous Vdd/Vth scaling for total power minimization

Proceedings of the 2006 international symposium on Physical design

Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction

Proceedings of the 43rd annual Design Automation Conference

An efficient retiming algorithm under setup and hold constraints

Proceedings of the 43rd annual Design Automation Conference

A new efficient retiming algorithm derived by formal manipulation

ACM Transactions on Design Automation of Electronic Systems (TODAES)

An efficient incremental algorithm for min-area retiming

Proceedings of the 45th annual Design Automation Conference

IPOSA: A Novel Slack Distribution Algorithm for Interconnect Power Optimization

ISQED '08 Proceedings of the 9th international symposium on Quality Electronic Design

Predicting potential performance for digital circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

A Unified Theory of Timing Budget Management

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems