Timing Analysis Using Functional Analysis
IEEE Transactions on Computers
Maximum current estimation in CMOS circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Certified timing verification and the transition delay of a logic circuit
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Constraint arithmetic on real intervals
Constraint logic programming
Circuit delay models and their exact computation using Timed Boolean Functions
DAC '93 Proceedings of the 30th international Design Automation Conference
Integrating Functional and Temporal Domains in Logic Design: The False Path Problem and Its Implications
Use of Fault Dropping for Multiple Fault Analysis
IEEE Transactions on Computers
Event propagation conditions in circuit delay computation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Propagation of last-transition-time constraints in gate-level timing analysis
Proceedings of the conference on Design, automation and test in Europe
Power analysis techniques for SoC with improved wiring models
Proceedings of the 2002 international symposium on Low power electronics and design
Bounding Switching Activity in CMOS Circuits Using Constraint Resolution
EDTC '96 Proceedings of the 1996 European conference on Design and Test
| Hi-index | 0.00 |