Representation of Logical Circuits by Linear Decision Diagrams with Extension to Nanostructures

  • Authors:
  • P. Dziurzanskii;V. P. Shmerko;S. N. Yanushkevich

  • Affiliations:
  • Strzelin Technical University, Strzelin, Poland;University of Calgary, Calgary, Canada;University of Calgary, Calgary, Canada

  • Venue:
  • Automation and Remote Control
  • Year:
  • 2004

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Abstract

The LinearDD system, which first permitted in logical design the representation of a logical circuit (combination circuit or a memory circuit) as two- and three-dimensional linear decision diagrams, is described. It is compatible with standard data formats (EDIF, ISCAS85, etc.) and designing tools, such as hardware description languages (HDL). This system is extended to circuit designing by nanotechnologies.