Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Quantum computation and quantum information
Quantum computation and quantum information
Reversible logic circuit synthesis
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Fast synthesis of exact minimal reversible circuits using group theory
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Exact sat-based toffoli network synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Fast exact Toffoli network synthesis of reversible logic
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
RevLib: An Online Resource for Reversible Functions and Reversible Circuits
ISMVL '08 Proceedings of the 38th International Symposium on Multiple Valued Logic
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
sKizzo: a suite to evaluate and certify QBFs
CADE' 20 Proceedings of the 20th international conference on Automated Deduction
Reversible cascades with minimal garbage
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Algorithm for Synthesis of Reversible Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A novel Toffoli network synthesis algorithm for reversible logic
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A Novel Transformation-Based Algorithm for Reversible Logic Synthesis
ISICA '09 Proceedings of the 4th International Symposium on Advances in Computation and Intelligence
Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
Electronic Notes in Theoretical Computer Science (ENTCS)
Reversible logic synthesis through ant colony optimization
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
Integration, the VLSI Journal
Synthesis and optimization of reversible circuits—a survey
ACM Computing Surveys (CSUR)
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In the last years synthesis of reversible logic functions has emerged as an important research area. Other fields such as low-power design, optical computing and quantum computing benefit directly from achieved improvements. Recently, several approaches for exact synthesis of Toffoli networks have been proposed. They all use Boolean satisfiability to solve the underlying synthesis problem. In this paper a new exact synthesis approach based on Quantified Boolean Formula (QBF) satisfiability - a generalization of Boolean satisfiability - is presented. Besides the application of QBF solvers, we propose Binary Decision Diagrams to solve the quantified problem formulation. This allows to easily support different gate libraries during synthesis. In addition, all minimal networks are found in a single step and the best one with respect to quantum costs can be chosen. Experimental results confirm that the new technique is faster than the best previously known approach and leads to cheaper realizations in terms of quantum costs.