Quantum computation and quantum information
Quantum computation and quantum information
Reversible logic circuit synthesis
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A new heuristic algorithm for reversible logic synthesis
Proceedings of the 41st annual Design Automation Conference
Quantum logic synthesis by symbolic reachability analysis
Proceedings of the 41st annual Design Automation Conference
Fast exact Toffoli network synthesis of reversible logic
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A novel synthesis algorithm for reversible circuits
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Quantified synthesis of reversible logic
Proceedings of the conference on Design, automation and test in Europe
Toffoli network synthesis with templates
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Algorithm for Synthesis of Reversible Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Novel Transformation-Based Algorithm for Reversible Logic Synthesis
ISICA '09 Proceedings of the 4th International Symposium on Advances in Computation and Intelligence
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Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input output correspondence which makes the logic synthesis for reversible functions differs greatly from traditional Boolean functions. Exact synthesis methods can provide optimal solutions in terms of the total number of reversible gates in the synthesis results. Unfortunately, they may suffer from long computation time, due to the fact that the search space is likely to grow exponentially as the circuit size increases. Therefore, in this paper, we propose an efficient synthesis heuristic which provides high quality synthesis results of Toffoli network in more reasonable computation time. We use a weighted, directed graph for reversible function representation and complexity measurement. The proposed algorithm maximally decreases function complexity during synthesis steps. It has the ability to climb out of local minimums and guarantees algorithm convergence. The experimental results show that our algorithm can achieve optimal or very close to optimal solutions with computation time several orders of magnitude less than the exact methods. Compared with other heuristics, our method demonstrates superior performance in terms of reversible gate count as well as computation time.