A decision procedure for bit-vector arithmetic
DAC '98 Proceedings of the 35th annual Design Automation Conference
GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
A machine program for theorem-proving
Communications of the ACM
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Quantum computation and quantum information
Quantum computation and quantum information
Proceedings of the 7th Colloquium on Automata, Languages and Programming
Reversible logic circuit synthesis
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Reversible logic synthesis
Exact sat-based toffoli network synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
CADE' 20 Proceedings of the 20th international conference on Automated Deduction
Toffoli network synthesis with templates
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Algorithm for Synthesis of Reversible Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Quantified synthesis of reversible logic
Proceedings of the conference on Design, automation and test in Europe
A novel Toffoli network synthesis algorithm for reversible logic
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Exact multiple-control toffoli network synthesis with SAT techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Novel Transformation-Based Algorithm for Reversible Logic Synthesis
ISICA '09 Proceedings of the 4th International Symposium on Advances in Computation and Intelligence
Proceedings of the Conference on Design, Automation and Test in Europe
Fault diagnosis in reversible circuits under missing-gate fault model
Computers and Electrical Engineering
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The research in the field of reversible logic is motivated by its application in low-power design, optical computing and quantum computing. Hence synthesis of reversible logic has become a very important research area in the last years. In this paper exact algorithms for the synthesis of generalized Toffoli networks are considered. We present an improvement of an existing synthesis approach that is based on Boolean Satisfiability. Furthermore, the principle limits of the original and the improved approach are shown. Then, we propose a new method using problem specific knowledge during the synthesis process to overcome these limits. Experimental results demonstrate improvements of the overall synthesis time up to four orders of magnitude.