Exact sat-based toffoli network synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Reversible circuit technology mapping from non-reversible specifications
Proceedings of the conference on Design, automation and test in Europe
Fast exact Toffoli network synthesis of reversible logic
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A novel synthesis algorithm for reversible circuits
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Reversible logic synthesis with Fredkin and Peres gates
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Quantified synthesis of reversible logic
Proceedings of the conference on Design, automation and test in Europe
Heuristic methods to use don't cares in automated design of reversible and quantum logic circuits
Quantum Information Processing
A novel Toffoli network synthesis algorithm for reversible logic
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A cycle-based synthesis algorithm for reversible logic
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Efficient Reversible Logic Design of BCD Subtractors
Transactions on Computational Science III
On figures of merit in reversible and quantum logic designs
Quantum Information Processing
BDD-based synthesis of reversible logic for large functions
Proceedings of the 46th Annual Design Automation Conference
Exact multiple-control toffoli network synthesis with SAT techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Novel Transformation-Based Algorithm for Reversible Logic Synthesis
ISICA '09 Proceedings of the 4th International Symposium on Advances in Computation and Intelligence
Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
Electronic Notes in Theoretical Computer Science (ENTCS)
A library-based synthesis methodology for reversible logic
Microelectronics Journal
IITA'09 Proceedings of the 3rd international conference on Intelligent information technology application
Reducing the number of lines in reversible circuits
Proceedings of the 47th Design Automation Conference
Synthesis of the optimal 4-bit reversible circuits
Proceedings of the 47th Design Automation Conference
Reversible logic synthesis through ant colony optimization
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
Reversible circuit synthesis using a cycle-based approach
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Improving the energy efficiency of reversible logic circuits by the combined use of adiabatic styles
Integration, the VLSI Journal
Integration, the VLSI Journal
Rule-based optimization of reversible circuits
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Logic synthesis for integrated optics
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Fault diagnosis in reversible circuits under missing-gate fault model
Computers and Electrical Engineering
Improving ESOP-based synthesis of reversible logic using evolutionary algorithms
EvoApplications'11 Proceedings of the 2011 international conference on Applications of evolutionary computation - Volume Part II
RevKit: an open source toolkit for the design of reversible circuits
RC'11 Proceedings of the Third international conference on Reversible Computation
Design of 1-tape 2-symbol reversible Turing machines based on reversible logic elements
Theoretical Computer Science
Integration, the VLSI Journal
Synthesis and optimization of reversible circuits—a survey
ACM Computing Surveys (CSUR)
BDD-Based Synthesis of Reversible Logic
International Journal of Applied Metaheuristic Computing
Depth-optimized reversible circuit synthesis
Quantum Information Processing
Design of efficient reversible logic-based binary and BCD adder circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Automatic design of low-power encoders using reversible circuit synthesis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Reversible circuit synthesis of symmetric functions using a simple regular structure
RC'13 Proceedings of the 5th international conference on Reversible Computation
Line ordering of reversible circuits for linear nearest neighbor realization
Quantum Information Processing
RMDDS: Reed-muller decision diagram synthesis of reversible logic circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Trading off circuit lines and gate costs in the synthesis of reversible logic
Integration, the VLSI Journal
Upper bounds for reversible circuits based on Young subgroups
Information Processing Letters
| Hi-index | 0.04 |
Reversible logic finds many applications, especially in the area of quantum computing. A completely specified n-input, n-output Boolean function is called reversible if it maps each input assignment to a unique output assignment and vice versa. Logic synthesis for reversible functions differs substantially from traditional logic synthesis and is currently an active area of research. The authors present an algorithm and tool for the synthesis of reversible functions. The algorithm uses the positive-polarity Reed-Muller expansion of a reversible function to synthesize the function as a network of Toffoli gates. At each stage, candidate factors, which represent subexpressions common between the Reed-Muller expansions of multiple outputs, are explored in the order of their attractiveness. The algorithm utilizes a priority-based search tree, and heuristics are used to rapidly prune the search space. The synthesis algorithm currently targets the generalized n-bit Toffoli gate library. However, other algorithms exist that can convert an n-bit Toffoli gate into a cascade of smaller Toffoli gates. Experimental results indicate that the authors' algorithm quickly synthesizes circuits when tested on the set of all reversible functions of three variables. Furthermore, it is able to quickly synthesize all four-variable and most five-variable reversible functions that were in the test suite. The authors also present results for some benchmark functions widely discussed in literature and some new benchmarks that the authors have developed. The algorithm is shown to synthesize many, but not all, randomly generated reversible functions of as many as 16 variables with a maximum gate count of 25