Transformation rules for designing CNOT-based quantum circuits
Proceedings of the 39th annual Design Automation Conference
Proceedings of the 7th Colloquium on Automata, Languages and Programming
A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Regular Realization of Symmetric Functions Using Reversible Logic
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
Proceedings of the conference on Design, automation and test in Europe - Volume 2
A new heuristic algorithm for reversible logic synthesis
Proceedings of the 41st annual Design Automation Conference
Quantum logic synthesis by symbolic reachability analysis
Proceedings of the 41st annual Design Automation Conference
Fredkin/Toffoli Templates for Reversible Logic Synthesis
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Reversible logic synthesis
Synthesis of reversible logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Reversible cascades with minimal garbage
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Toffoli network synthesis with templates
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Algorithm for Synthesis of Reversible Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Reversible circuit synthesis using a cycle-based approach
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Synthesis and optimization of reversible circuits—a survey
ACM Computing Surveys (CSUR)
Reversible logic synthesis by quantum rotation gates
Quantum Information & Computation
Line ordering of reversible circuits for linear nearest neighbor realization
Quantum Information Processing
RMDDS: Reed-muller decision diagram synthesis of reversible logic circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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Reversible logic has applications in low-power computing and quantum computing. Most reversible logic synthesis methods are tied to particular gate types, and cannot synthesize large functions. This article extends RMRLS, a reversible logic synthesis tool, to include additional gate types. While classic RMRLS can synthesize functions using NOT, CNOT, and n-bit Toffoli gates, our work details the inclusion of n-bit Fredkin and Peres gates. We find that these additional gates reduce the average gate count for three-variable functions from 6.10 to 4.56, and improve the synthesis results of many larger functions, both in terms of gate count and quantum cost.