Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Branching programs and binary decision diagrams: theory and applications
Branching programs and binary decision diagrams: theory and applications
Quantum computation and quantum information
Quantum computation and quantum information
Proceedings of the 7th Colloquium on Automata, Languages and Programming
A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
A new heuristic algorithm for reversible logic synthesis
Proceedings of the 41st annual Design Automation Conference
Data structures and algorithms for simplifying reversible circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Techniques for the synthesis of reversible Toffoli networks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
RevLib: An Online Resource for Reversible Functions and Reversible Circuits
ISMVL '08 Proceedings of the 38th International Symposium on Multiple Valued Logic
Proceedings of the conference on Design, automation and test in Europe
Exact multiple-control toffoli network synthesis with SAT techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal synthesis of linear reversible circuits
Quantum Information & Computation
Synthesis of reversible logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Reversible cascades with minimal garbage
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Toffoli network synthesis with templates
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Algorithm for Synthesis of Reversible Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
Electronic Notes in Theoretical Computer Science (ENTCS)
A library-based synthesis methodology for reversible logic
Microelectronics Journal
Enhancing debugging of multiple missing control errors in reversible logic
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Reversible online BIST using bidirectional BILBO
Proceedings of the 7th ACM international conference on Computing frontiers
Reducing the number of lines in reversible circuits
Proceedings of the 47th Design Automation Conference
Integration, the VLSI Journal
Logic synthesis for integrated optics
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Improving ESOP-based synthesis of reversible logic using evolutionary algorithms
EvoApplications'11 Proceedings of the 2011 international conference on Applications of evolutionary computation - Volume Part II
Reversible synthesis in the walsh hadamard domain
EUROCAST'11 Proceedings of the 13th international conference on Computer Aided Systems Theory - Volume Part II
Realizing reversible circuits using a new class of quantum gates
Proceedings of the 49th Annual Design Automation Conference
Constant-optimized quantum circuits for modular multiplication and exponentiation
Quantum Information & Computation
RevKit: an open source toolkit for the design of reversible circuits
RC'11 Proceedings of the Third international conference on Reversible Computation
Towards the limits of cascaded reversible (quantum-inspired) circuits
RC'11 Proceedings of the Third international conference on Reversible Computation
Reversible circuits: recent accomplishments and future challenges for an emerging technology
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
Synthesis and optimization of reversible circuits—a survey
ACM Computing Surveys (CSUR)
BDD-Based Synthesis of Reversible Logic
International Journal of Applied Metaheuristic Computing
Depth-optimized reversible circuit synthesis
Quantum Information Processing
Reversible logic synthesis of k-input, m-output lookup tables
Proceedings of the Conference on Design, Automation and Test in Europe
Automatic design of low-power encoders using reversible circuit synthesis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Reversible circuit synthesis of symmetric functions using a simple regular structure
RC'13 Proceedings of the 5th international conference on Reversible Computation
Exploiting negative control lines in the optimization of reversible circuits
RC'13 Proceedings of the 5th international conference on Reversible Computation
Reducing the depth of quantum circuits using additional circuit lines
RC'13 Proceedings of the 5th international conference on Reversible Computation
Reversible logic synthesis by quantum rotation gates
Quantum Information & Computation
Line ordering of reversible circuits for linear nearest neighbor realization
Quantum Information Processing
RMDDS: Reed-muller decision diagram synthesis of reversible logic circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Trading off circuit lines and gate costs in the synthesis of reversible logic
Integration, the VLSI Journal
Considering nearest neighbor constraints of quantum circuits at the reversible circuit level
Quantum Information Processing
| Hi-index | 0.00 |
Reversible logic is the basis for several emerging technologies such as quantum computing, optical computing, or DNA computing and has further applications in domains like low-power design and nanotechnologies. However, current methods for the synthesis of reversible logic are limited, i.e. they are applicable to relatively small functions only. In this paper, we propose a synthesis approach, that can cope with Boolean functions containing more than a hundred of variables. We present a technique to derive reversible circuits for a function given by a Binary Decision Diagram (BDD). The circuit is obtained using an algorithm with linear worst case behavior regarding run-time and space requirements. Furthermore, the size of the resulting circuit is bounded by the BDD size. This allows to transfer theoretical results known from BDDs to reversible circuits. Experiments show better results (with respect to the circuit cost) and a significantly better scalability in comparison to previous synthesis approaches.