A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Evolutionary Approach to Quantum andReversible Circuits Synthesis
Artificial Intelligence Review
A new heuristic algorithm for reversible logic synthesis
Proceedings of the 41st annual Design Automation Conference
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
VLSID '06 Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design
An Introduction to Quantum Computing
An Introduction to Quantum Computing
Exact sat-based toffoli network synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Synthesis of Reversible Sequential Elements
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Heuristic methods to use don't cares in automated design of reversible and quantum logic circuits
Quantum Information Processing
An Algorithm for Synthesis of Reversible Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A library-based synthesis methodology for reversible logic
Microelectronics Journal
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Transistor realization of reversible "ZS" series gates and reversible array multiplier
Microelectronics Journal
Controlled gates for multi-level quantum computation
Quantum Information Processing
Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology
Microelectronics Journal
Design of efficient reversible logic-based binary and BCD adder circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Online Testable Approaches in Reversible Logic
Journal of Electronic Testing: Theory and Applications
Upper bounds for reversible circuits based on Young subgroups
Information Processing Letters
| Hi-index | 0.00 |
Five figures of merit including number of gates, quantum cost, number of constant inputs, number of garbage outputs, and delay are used casually in the literature to compare the performance of different reversible or quantum logic circuits. In this paper we propose new definitions and enhancements, and identify similarities between these figures of merit. We evaluate these measures to show their strength and weakness. Instead of the number of gates, we introduce the weighted number of gates, where a weighting factor is assigned to each quantum or reversible gate, based on its type, size and technology. We compare the quantum cost with weighted number of gates of a circuit and show three major differences between these measures. It is proved that it is not possible to define a universal reversible logic gate without adding constant inputs. We prove that there is an optimum value for number of constant inputs to obtain a circuit with minimum quantum cost. Some reversible logic benchmarks have been synthesized using Toffoli and Fredkin gates to obtain their optimum values of number of constant inputs. We show that the garbage outputs can also be used to decrease the quantum cost of the circuit. A new definition of delay in quantum and reversible logic circuits is proposed for music line style representation. We also propose a procedure to calculate the delay of a circuit, based on the quantum cost and the depth of the circuit. The results of this research show that to achieve a fair comparison among designs, figures of merit should be considered more thoroughly.