Proceedings of the conference on Design, automation and test in Europe - Volume 2
A new heuristic algorithm for reversible logic synthesis
Proceedings of the 41st annual Design Automation Conference
On Universality of General Reversible Multiple-Valued Logic Gates
ISMVL '04 Proceedings of the 34th International Symposium on Multiple-Valued Logic
Reversible computing: from mathematical group theory to electronical circuit experiment
Proceedings of the 2nd conference on Computing frontiers
Design of a compact reversible binary coded decimal adder circuit
Journal of Systems Architecture: the EUROMICRO Journal
A Two's Complement Parallel Array Multiplication Algorithm
IEEE Transactions on Computers
Novel Reversible Multiplier Architecture Using Reversible TSG Gate
AICCSA '06 Proceedings of the IEEE International Conference on Computer Systems and Applications
Synthesis of reversible sequential elements
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Heuristic methods to use don't cares in automated design of reversible and quantum logic circuits
Quantum Information Processing
An Introduction to Reversible Latches
The Computer Journal
On figures of merit in reversible and quantum logic designs
Quantum Information Processing
Irreversibility and heat generation in the computing process
IBM Journal of Research and Development
Logical reversibility of computation
IBM Journal of Research and Development
Transistor realization of reversible "ZS" series gates and reversible array multiplier
Microelectronics Journal
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Reversible cascades with minimal garbage
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesis of quantum-logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Today, reversible logic is emerging as an intensely studied research topic, having applications in diverse fields, such as low-power design, optical information processing, and quantum computation. In this paper, we have proposed two reversible Wallace signed multiplier circuits through modified Baugh-Wooley approach, which are much better than the two available counterparts in all the terms. The multiplier is an essential building block for the construction of computational units of quantum computers. Besides, we need signed multiplier circuits for numerous operations. However, only two reversible signed multiplier circuits have been presented so far. In the first proposed architecture, our goals are to decrease the depth of the circuit and to increase the speed of the circuit. In the second proposed circuit, we aimed to improve the quantum cost, garbage outputs, and other parameters. All the proposed circuits are in the nanometric scales and can be used in the design of very complex systems.