Computer engineering hardware design
Computer engineering hardware design
Quantum computation and quantum information
Quantum computation and quantum information
A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Fault Testing for Reversible Circuits
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
A new heuristic algorithm for reversible logic synthesis
Proceedings of the 41st annual Design Automation Conference
Testing for Missing-Gate Faults in Reversible Circuits
ATS '04 Proceedings of the 13th Asian Test Symposium
Reversible computing: from mathematical group theory to electronical circuit experiment
Proceedings of the 2nd conference on Computing frontiers
Proceedings of the 2nd conference on Computing frontiers
Fast synthesis of exact minimal reversible circuits using group theory
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic
IEEE Transactions on Computers
Design for Testability A Survey
IEEE Transactions on Computers
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Transistor realization of reversible "ZS" series gates and reversible array multiplier
Microelectronics Journal
Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology
Microelectronics Journal
Integration, the VLSI Journal
Design of efficient reversible logic-based binary and BCD adder circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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To construct a reversible sequential circuit, reversible sequential elements are required. This work presents novel designs of reversible sequential elements such as the D latch, JK latch, and T latch. Based on these reversible latches, we construct the designs of the corresponding flip-flops. Then we further discuss the physical implementations of our designs based on electron waveguide Y-branch switch technology. Test costs, including test generation and test application, of reversible sequential circuits with these reversible flip-flops are also discussed. Compared with previous work, the implementation cost of our new designs, including the number of gates and the number of garbage outputs, is significantly reduced. The number of gates in our designs is 47.4% of the designs in previous work on average. The number of garbage outputs in our designs is 25% of the designs in previous work on average.