A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Synthesis of reversible logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Bi-Direction Synthesis for Reversible Circuits
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Synthesis of reversible sequential elements
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Quantified synthesis of reversible logic
Proceedings of the conference on Design, automation and test in Europe
Exact multiple-control toffoli network synthesis with SAT techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Realization and synthesis of reversible functions
Theoretical Computer Science
Group theory based synthesis of binary reversible circuits
TAMC'06 Proceedings of the Third international conference on Theory and Applications of Models of Computation
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We present fast algorithms to synthesize exact minimal reversible circuits for various types of gates and costs. By reducing reversible logic synthesis problems to group theory problems, we use the powerful algebraic software GAP to solve such problems. Our algorithms are not only able to minimize for arbitrary cost functions of gates, but also orders of magnitude faster than the existing approaches to reversible logic synthesis. In addition, we show that the Peres gate is a better choice than the standard Toffoli gate in libraries of universal reversible gates.