Synthesis of multi-qudit hybrid and d-valued quantum logic circuits by decomposition
Theoretical Computer Science
Checking equivalence of quantum circuits and states
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
High-level interconnect model for the quantum logic array architecture
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
A fault tolerant, area efficient architecture for Shor's factoring algorithm
Proceedings of the 36th annual international symposium on Computer architecture
A library-based synthesis methodology for reversible logic
Microelectronics Journal
Reversible circuit synthesis using a cycle-based approach
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Transistor realization of reversible "ZS" series gates and reversible array multiplier
Microelectronics Journal
On the Effect of Quantum Interaction Distance on Quantum Addition Circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology
Microelectronics Journal
Block-based quantum-logic synthesis
Quantum Information & Computation
A new algorithm for producing quantum circuits using KAK decompositions
Quantum Information & Computation
Synthesis of quantum circuits for d-level systems by using cosine-sine decomposition
Quantum Information & Computation
On the CNOT-cost of TOFFOLI gates
Quantum Information & Computation
Quantum expanders from any classical Cayley graph expander
Quantum Information & Computation
Faithful teleportation via multi-particle quantum states in a network with many agents
Quantum Information Processing
Quantum circuits for spin and flavor degrees of freedom of quarks forming nucleons
Quantum Information Processing
Decomposition of orthogonal matrix and synthesis of two-qubit and three-qubit orthogonal gates
Quantum Information & Computation
A reversible processor architecture and its reversible logic design
RC'11 Proceedings of the Third international conference on Reversible Computation
A Θ( √ n)-depth quantum adder on the 2D NTC quantum computer architecture
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Using non-ideal gates to implement universal quantum computing between uncoupled qubits
Quantum Information Processing
Synthesis and optimization of reversible circuits—a survey
ACM Computing Surveys (CSUR)
Efficient quantum computing between remote qubits in linear nearest neighbor architectures
Quantum Information Processing
Faithful quantum broadcast beyond the no-go theorem
Quantum Information Processing
Quantum Information & Computation
Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures
Proceedings of the 50th Annual Design Automation Conference
Constant-Factor optimization of quantum adders on 2d quantum architectures
RC'13 Proceedings of the 5th international conference on Reversible Computation
Reversible logic synthesis by quantum rotation gates
Quantum Information & Computation
Line ordering of reversible circuits for linear nearest neighbor realization
Quantum Information Processing
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The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits (Proc. R. Soc. Lond. A, Math. Phys. Sci., vol. 425, p. 73, 1989) to the attention of the electronic design automation community (Proc. 40th ACM/IEEE Design Automation Conf., 2003), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 68, p. 012318, 2003), (Proc. 41st Design Automation Conf., 2004), (Proc. 39th Design Automation Conf., 2002), (Proc. Design, Automation, and Test Eur., 2004), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 69, p. 062321, 2004), (IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, p. 710, 2003). Efficient quantum-logic circuits that perform two tasks are discussed: 1) implementing generic quantum computations, and 2) initializing quantum registers. In contrast to conventional computing, the latter task is nontrivial because the state space of an n-qubit register is not finite and contains exponential superpositions of classical bitstrings. The proposed circuits are asymptotically optimal for respective tasks and improve earlier published results by at least a factor of 2. The circuits for generic quantum computation constructed by the algorithms are the most efficient known today in terms of the number of most expensive gates [quantum controlled-NOTs (CNOTs)]. They are based on an analog of the Shannon decomposition of Boolean functions and a new circuit block, called quantum multiplexor (QMUX), which generalizes several known constructions. A theoretical lower bound implies that the circuits cannot be improved by more than a factor of 2. It is additionally shown how to accommodate the severe architectural limitation of using only nearest neighbor gates, which is representative of current implementation technologies. This increases the number of gates by almost an order of magnitude, but preserves the asymptotic optimality of gate counts