A reversible processor architecture and its reversible logic design

  • Authors:
  • Michael Kirkedal Thomsen;Holger Bock Axelsen;Robert Glück

  • Affiliations:
  • DIKU, Department of Computer Science, University of Copenhagen, Copenhagen, Denmark;DIKU, Department of Computer Science, University of Copenhagen, Copenhagen, Denmark;DIKU, Department of Computer Science, University of Copenhagen, Copenhagen, Denmark

  • Venue:
  • RC'11 Proceedings of the Third international conference on Reversible Computation
  • Year:
  • 2011

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Abstract

We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed an architecture with an ISA that is expressive enough to serve as the target for a compiler from a high-level structured reversible programming language. All-in-all, this paper demonstrates that the design of a complete reversible computing architecture is possible and can serve as the core of a programmable reversible computing system.