Efficient Reversible Logic Design of BCD Subtractors

Authors:
Himanshu Thapliyal;Hamid R. Arabnia;M. B. Srinivas
Affiliations:
Department of Computer Science and Engineering, University of South Florida, USA;Department of Computer Science, University of Georgia, USA;Centre for VLSI Design and Embedded Systems, IIIT Hyderabad, India
Venue:
Transactions on Computational Science III
Year:
2009

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Abstract

Reversible logic is emerging as a promising computing paradigm, having its applications in low-power CMOS, quantum computing, nanotech-nology and optical computing. Firstly, we showed a modified design of conventional BCD subtractors and also proposed designs of carry look-ahead and carry skip BCD subtractors. The proposed designs of carry look-ahead and carry skip BCD subtractors are based on the novel designs of carry look-ahead and carry skip BCD adders, respectively. Then, we introduced the reversible logic implementation of the modified conventional, as well as the proposed, carry look-ahead and carry skip BCD subtractors efficient in terms of the number of reversible gates used and garbage output produced. To the best of our knowledge, the carry look-ahead and carry skip BCD subtractors and their reversible logic design are explored for the first time ever in literature.