True single-phase energy-recovering logic for low-power, high-speed VLSI
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Computer Arithmetic Algorithms
Computer Arithmetic Algorithms
Digital Circuits and Microprocessors
Digital Circuits and Microprocessors
Proceedings of the 7th Colloquium on Automata, Languages and Programming
Pipelined DSP Design with a True Single-Phase Energy-Recovering Logic Style
VOLTA '99 Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low-Power Design
Reversible computing: from mathematical group theory to electronical circuit experiment
Proceedings of the 2nd conference on Computing frontiers
Data structures and algorithms for simplifying reversible circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder
UC '08 Proceedings of the 7th international conference on Unconventional Computing
Efficient Reversible Logic Design of BCD Subtractors
Transactions on Computational Science III
Enhancing debugging of multiple missing control errors in reversible logic
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Reversible online BIST using bidirectional BILBO
Proceedings of the 7th ACM international conference on Computing frontiers
Reducing the number of lines in reversible circuits
Proceedings of the 47th Design Automation Conference
Integration, the VLSI Journal
Transistor realization of reversible "ZS" series gates and reversible array multiplier
Microelectronics Journal
Improving ESOP-based synthesis of reversible logic using evolutionary algorithms
EvoApplications'11 Proceedings of the 2011 international conference on Applications of evolutionary computation - Volume Part II
RevKit: an open source toolkit for the design of reversible circuits
RC'11 Proceedings of the Third international conference on Reversible Computation
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CSR'07 Proceedings of the Second international conference on Computer Science: theory and applications
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ACM Computing Surveys (CSUR)
BDD-Based Synthesis of Reversible Logic
International Journal of Applied Metaheuristic Computing
Design of efficient reversible logic-based binary and BCD adder circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Reversible circuit synthesis of symmetric functions using a simple regular structure
RC'13 Proceedings of the 5th international conference on Reversible Computation
Online Testable Approaches in Reversible Logic
Journal of Electronic Testing: Theory and Applications
Trading off circuit lines and gate costs in the synthesis of reversible logic
Integration, the VLSI Journal
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In principle, any reversible logic circuit can be built by using a single building block (having three logic inputs and three logic outputs). However, no simple synthesis tool is available to tell us how a particular logic operation has to be composed of such unit. We demonstrate that, for a flexible design, it is more advantageous to use a broad class of reversible gates, called control gates. They form a generalization of Feynman's three gates (i.e. the NOT, the CONTROLLED NOT, and the CONTROLLED CONTROLLED NOT). As an illustration, a 320-transistor reversible 4-bit carry-look-ahead adder in 0.8 µm c-MOS has been built.